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RISC-V Assembly Simulator

Education

Gratuit

RISC-V Assembly Simulator

par Matthew Jacobs

v2.2 3 Mo Universel 4+

Captures d'écran

Description

RISC-V Assembly Simulator is a mobile 32-bit system simulator. The app simulates the entire system, all the way from each individual unit on a CPU to the memory subsystem. Write assembly natively to the CPU, with a built-in debugger so you can analyze your code and see what the hardware is doing.

Nouveautés (v2.2)

Minor CPU revision - when failing to fully decode an instruction, halt is used instead of allowing a partial decode
Assembler now supports ASCII for immediate values. Write it as 'ABCD' for 4 bytes.
Push and pop pseudo support added
Small improvements to encoding immediates
When viewing a number in an instruction result, a little menu appears showing all notations of the value (hex binary signed unsigned ASCII)
Updated results page when no program is running
Fixed bug where you can't filter logs when program Is halted